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Asxetaras
By Guest on 16th May 2019 01:36:51 PM | Syntax: TEXT | Views: 4



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  1. ApLototéAELo I'lavemotr'] uLo Oeooaon'Lan
  2.  
  3. ' '.' "2;? -. Tur'] pa HAEKIpoAévwv MnXOLVLKdN KC(L MnXOLVLKdN YnvovLoto'uv
  4. 3 Touéaq HASKtpOVLKfiq Km YnvovLoto'uv
  5.  
  6. AKaSnua‘L’Ké'Etoq : 2017—2018
  7.  
  8. Efidunvo: 8
  9.  
  10.  
  11.  
  12.  
  13.  
  14. MIKPOEI'IEEEPI'AZTEZ
  15. KAI
  16. I'IEPICDEPEIAKA
  17.  
  18. EAEI'XOZ ANOIKTOY BPOXOY ZTPOCDQN DC
  19. KINHTHPA
  20.  
  21. Group : B
  22. Opdéa:4
  23.  
  24. l'lomndc Anpfitplog : 8391
  25. I'llnspiénc Avéorng : 8689
  26.  
  27. Zto napomdtu) npéypauua xpnmuonmobue tov npo’oto tpéno VLOL VOL
  28. unvoyioouue tnv ouxvétnta neptorpocbfiq tou KLvntfipa Kaewq Kou tLq
  29. 0tp0¢éq tou 0'8 rpm.
  30.  
  31. I'ILo ouyKEKpLuéva éxou us evepyonomoa tov timerl VOL napdfia interrupt 0'8
  32.  
  33. , , , , , CK
  34. xpovo evoq (Seurepokentou Gatovmq tov prescaler 0'8 nun M'
  35.  
  36. Emnpooeétwq éxou us pueuioa étcn tov timerl (bate K6168 cbopd nou éxouue
  37. nakué omo tov OK 0'8 GEILKé uétwno VOL napdya interrupt uéoa oro onoio
  38. aufidvouue K6168 cbopd évow ustpntr'] KOL‘EéL éva.
  39.  
  40. Kou téAoq (Sivouue 001v eiooéo Otov ADC tnv tdon sloééou tou KLvntfipa Kou
  41. naipvou us 001v éEoéo tov apLGué tou emnééou tnq tdonq ( us eowtepLKr'] tdon
  42. tpo¢0600iaq 2.56 volt ).
  43.  
  44. .include "m16def.inc"
  45.  
  46. .def counterH = r1
  47.  
  48. .def counterl = r2
  49.  
  50. .def one = r3
  51.  
  52. .def zero = r4
  53.  
  54. .def temp = r16
  55.  
  56. .def flag = r1?
  57.  
  58. .def lads = r18
  59.  
  60. .equ start = 58630 ; FOR 1 SECOND TIME AND
  61.  
  62. , F = 4 MHZ AND PRESCALER TO CK/lfl24
  63. .equ startH = high(3tart)
  64. .equ startl = lawfistart)
  65.  
  66. rjmp reset
  67.  
  68. reti
  69.  
  70. reti
  71.  
  72. reti
  73.  
  74. reti
  75.  
  76. reti
  77.  
  78. reti
  79.  
  80. reti
  81.  
  82. reti
  83.  
  84. reti
  85.  
  86. jmp capture_interrupt
  87.  
  88. reti
  89.  
  90. reti
  91.  
  92. reti
  93.  
  94. reti
  95.  
  96. jmp timerl_averflaw ; IHTERRUPT VECTOR MUST
  97. J BE TO 0316 ADDRESS
  98.  
  99. reti
  100. reti
  101. reti
  102. reti
  103. reti
  104. reti
  105. reti
  106. reti
  107. reti
  108. reti
  109. jmp ado_interrupt ; INTERRUPT OF
  110. ' ADC VECTOR MUST BE TO 032? ADDRESS
  111. reti
  112.  
  113. reset:
  114.  
  115. :INITIALIZE STACK POINTER
  116. ldi temp,HIGH(RAHEND)
  117.  
  118. out SPH,temp
  119.  
  120. ldi temp,LOH(RAMEND)
  121.  
  122. out SPL,temp
  123.  
  124. :REGISTER ONE USEFUL FOR CALCULATING THE PULSES
  125. ;REGISTER ZERO IS USEFUL FOR INC THE lE—BIT COUNTER(H/I)
  126. olr one
  127.  
  128. ino one
  129.  
  130. olr zero
  131.  
  132. elr flag
  133.  
  134. :CLEARING THE COUNTER FOR THE PULSES
  135. elr oounterH
  136. olr oounterl
  137.  
  138. :SET PORTD AS INPUT FOR THE SIGNAL
  139. ldi temp,D
  140. out DDRD,temp
  141.  
  142. :SET PORTC AS INPUT FOR THE SH
  143. ldi temp,fl
  144. out DDRC,temp
  145.  
  146. LSET FORTE AS OUTPUT — LEDS
  147. ldi temp,UEFF
  148. out DDRB,temp
  149.  
  150. :SET PORTA AS INPUT — ADC
  151. ldi temp,fl
  152. out DDRA,temp
  153.  
  154. iENABLE INTERRUPTS 0F TIMERl — OVERFLOH AND INPUT CAPTURE
  155. ldi temp,UbUUlUUlUU
  156. out TIMSK,temp
  157.  
  158. ldi temp,fl
  159.  
  160. out ICRlH,temp
  161. out ICRlL,temp
  162. out ACSR,temp
  163.  
  164. :SET TIMERl
  165.  
  166. ldi temp,etartH
  167. out TCNTlH,temp
  168. ldi temp,etartl
  169. out TCNTll,temp
  170.  
  171. ;SET PRESCALER CK/1024
  172. ldi temp,fl
  173.  
  174. out TCCRlA,temp
  175.  
  176. ldi temp,UbUlUUDlUU
  177. out TCCRlB,temp
  178.  
  179. :ENABLE INTERRUPTS
  180.  
  181. sei
  182.  
  183. JENDLESS LOOP TILL INTERRUPT FROM TIMER l — OVERFLOU
  184. JCOUHTIHG THE PULSES FROM 0 TO 1 OF THE DC MOTOR
  185. loop:
  186.  
  187. opi flag,l
  188. breq continue
  189. rjmp loop
  190.  
  191. continue:
  192.  
  193. :INITIALIZE THE ADMUX REGISTER
  194. :GET INPUT FROM FIND OF PORTA
  195. ldi temp,flblllflflflflfl
  196.  
  197. out ADMUX,temp
  198.  
  199. JINITIALIZE THE ADCSRA REGISTER
  200. ldi temp.nbllflflllfll
  201. out ADCSRA,temp
  202.  
  203. end_of_program:
  204.  
  205. rjmp end_of_program
  206.  
  207. timerl_overflow:
  208.  
  209. oom oounterH
  210. out PORTB,oounterH
  211.  
  212. loop_for_dieplay:
  213.  
  214. :HAITIHG FOR SN? TO BE PRESSED
  215. ehie PINC,?
  216.  
  217. rjmp loop_for_dieplay
  218.  
  219. oom oounterL
  220. out PORTB,eounterL
  221.  
  222. :STOP THE TIMERl — HO IHTERRUPTS FROM NOW
  223. ldi temp,U
  224.  
  225. out TCCRlB,temp
  226.  
  227. :GET THE COUNTER TO PREVIOUS STATUS
  228.  
  229. oom oounterH
  230.  
  231. oom eounterl
  232.  
  233. ino flag
  234.  
  235. reti
  236.  
  237. ado_interrupt:
  238.  
  239. wait_for_ew?:
  240.  
  241. :UAITING FOR SN? TO BE PRESSED IN
  242. JORDER TO SHOW THE RESULT OF THE ADC
  243. Sbic PINC,7
  244.  
  245. rjmp wait_for_sw7
  246.  
  247. :SHOU THE OUTPUT TO LEDS
  248. in leds,ADCH
  249.  
  250. com lads
  251.  
  252. out PORTB,ledS
  253.  
  254. :DISABIE THE AD CONVERTER
  255. ldi temp,fl
  256. out ADCSRA,temp
  257.  
  258. reti
  259.  
  260. :HHEN GOT A PULSE FROM 0 TO 1 THEN INC THE COUNTER
  261. capture_interrupt:
  262.  
  263. ole
  264. add counterl,one
  265. ado counterH,zero
  266.  
  267. reti
  268.  
  269. Zto napomdtu) npéypauua xpnmuonmobue tov 680t£po tpéno VLOL VOL
  270. unvoyioouue tnv ouxvétnta neptorpocbfiq tou KLvntfipa Kaewq Kou tLq
  271. orpocbéq tou 0'8 rpm.Yno}\oinouue 0'8 néoo xpévo éxouue 4 nakuobq omo tov
  272. OK KOL‘EéL to GEILKé uétwno.
  273.  
  274. .inolude ”m16def.ine" :STOP THE LOOP UHEN 4 PULSES
  275. cpi counter,pulses
  276. _ breq continue
  277. .def temp — r16 rjmp loop
  278. .def leds = r1?
  279. .def counter = r13 .
  280. continue:
  281. .equ pulses = 4 :STOP THE TIMERl
  282. ldi temp,D
  283. . out TCCRlA,temp
  284. erP IESEt out TCCRlB,temp
  285. ret1
  286. reti :SHOW TO LEDS THE TCNTlH
  287. . in ledS,TCNTlH
  288. rEtl com lads
  289. reti out PORTB,leds
  290. ret; :UAIT FOR THE em? TO BE PRESSED
  291. ret1 wait_3w?:
  292. reti Shic PIHC,?
  293. reti rjmp waltisw?
  294. rEtl _ §UHEN SH? IS PRESSED THEN SHOW THE TCNTlL
  295. jmp oapture_1nterrupt 1n lEdS»TCNT11
  296. reti com lads
  297. out PORTB,ledS
  298. rESEt' end_0f_pragram:
  299. §INITIALIZE STACK POINTER rjmp end_0f_pragram
  300. 1d: égflpiHIGH(RAHEND) :UHEN CAPTURE A PULSE FROM 0 TO 1 THEN INC THE COUNTER
  301. Du_ . emp capture_interrupt:
  302. ldl tEmp,LOH(RAHEND) inc counter
  303.  
  304. out SPI,temp
  305.  
  306. reti
  307.  
  308. :CLEAR THE COUNTER OF THE PULSES
  309.  
  310. olr counter
  311.  
  312. LSET FORTE AS OUTPUT — LEDS
  313. ldi temp,UxFF
  314. out DDRB,temp
  315.  
  316. :SET PORTD AS INPUT FOR THE SIGNAL
  317. ldi temp,D
  318. out DDRD,temp
  319.  
  320. :SET PORTC AS INPUT FOR THE SH
  321. ldi temp,D
  322. out DDRC,temp
  323.  
  324. :ENABLE INTERRUPTS OF TIMERl INPUT CAPTURE
  325. ldi temp,DhUUlUUUUU
  326. out TIMSK,temp
  327.  
  328. ldi temp,D
  329.  
  330. out ICRlH,temp
  331. out ICRlL,temp
  332. out ACSR,temp
  333.  
  334. :SET TIMERl
  335. ldi temp,D
  336. out TCNTlH,temp
  337. out TCNTlL,temp
  338.  
  339. :SET PRESCAIER CK/64
  340. out TCCRlA,temp
  341. ldi temp,DbDlUUUDll
  342. out TCCRlB,temp
  343.  
  344. :ENABLE INTERRUPTS
  345.  
  346. sei
  347.  
  348. :ENDLESS LOOP TILL IHTERRUPT FROM TIMER l — OVERFIOU
  349. :COUNTING THE PULSES FROM D T0 1 OF THE DC MOTOR
  350. loop:
  351.  
  352. Ano ta 600 napomdvu) npoypduuata naipvou us tLq napomdtu) ustprfioaq uno
  353. uopdfl'] mvéLva:
  354.  
  355.  
  356.  
  357.  
  358.  
  359.  
  360.  
  361.  
  362.  
  363.  
  364.  
  365.  
  366.  
  367.  
  368.  
  369.  
  370.  
  371.  
  372.  
  373.  
  374.  
  375.  
  376.  
  377.  
  378.  
  379.  
  380.  
  381.  
  382.  
  383.  
  384.  
  385.  
  386.  
  387.  
  388.  
  389.  
  390.  
  391.  
  392.  
  393.  
  394.  
  395.  
  396.  
  397.  
  398.  
  399.  
  400.  
  401.  
  402.  
  403.  
  404.  
  405.  
  406.  
  407.  
  408.  
  409.  
  410.  
  411.  
  412.  
  413. 39$:an FEE]? T[sec] f[Hz] RPM
  414. 1 3.1 0.00024 4166.667 7812.50001
  415. 2 3.2 0.000235 4255.319 797872341
  416. 3 3.3 0.00022 4545.455 852232228
  417. 4 3.5 0.00019 5263.158 9868.42104
  418. 5 3.6 0.000185 5405.405 101351351
  419. 6 3.8 0.00018 5555.556 10416666?
  420. T 4.1 0.0001? 5882.353 110294118
  421. 8 4.3 0.000155 6451.613 12096.7?42
  422. 9 4.6 0.00014 7142.857 133928571
  423. 10 4.9 0.00011 9090.909 12045.4545
  424.  
  425. Aplfluéq Umowr [binary] Umamr [decimal]
  426.  
  427. Métpnfinn
  428.  
  429. 1 00000011 3
  430.  
  431. 2 00001100 12
  432.  
  433. 3 00010100 20
  434.  
  435. 4 00011101 29
  436.  
  437. 5 00100110 38
  438.  
  439. 6 00101111 47
  440.  
  441. 1" 00111000 56
  442.  
  443. 8 01000000 64
  444.  
  445. 9 01001010 74
  446.  
  447. 10 01010011 83
  448.  
  449.  
  450.  
  451.  
  452.  
  453.  
  454.  
  455.  
  456.  
  457.  
  458.  
  459. Zto napomdtu) npéypauua EAéyxouue tov KLvntfipa uéou) tou AVR,BdZovmq
  460. 001v eiooéo “La nakuooapd us tnv Asttoupyia tou PWM .KdGe cbopd nou
  461. natdue tov SWO aufidvouue to duty cycle KOL‘EéL 5% (obvvo 10 ¢opéq).Katémv
  462. K6168 cbopd nou natdue tov SW1 uadovouue to duty cycle KOL‘EéL 5% (cn'JVOAo 14
  463. dmpéc).
  464.  
  465. include "mlfidef - inc" :IJAIT FOR SIJl TO BE PRESSED
  466. ehio PINC,1
  467. rjmp decrease_loop
  468.  
  469. .def increase_etep = r16
  470. .dEf decrease_step = r1? ;DECREASE THE OCRlAI BY 51 ( — ABOUT EX DUTY CYCLE )
  471. .def counter = r18 sub timer,decrease_step
  472. .def leds = r19 out OCRlAI,timer
  473. .def temp = r20
  474. .def timer = r21 inc counter
  475. cpi counter,decrease_iterations
  476. .equ increase_iterations = 10 hneq 100D
  477. .equ decrease_iterations = 14 erD decrease_loop
  478. .equ value_for_higher_dutv_oycle = 51
  479. .equ value_for_lower_duty_cyole = 51
  480. loop:
  481.  
  482. rjmp reset
  483. rjmp loop
  484.  
  485. reset:
  486. :INITIAIIZE STACK POINTER
  487. 1di temp,high(RAMEND)
  488.  
  489. out Sph,temp
  490.  
  491. 1di temp,low(RéMEND)
  492.  
  493. out Spl,temp
  494.  
  495. :INITIALIZE THE PARAMETERS
  496.  
  497. ldi increase_step,value_fDr_higher_dut?_cycle
  498. ldi decrease_step,value_fDr_lower_duty_cycle
  499. Clr counter
  500.  
  501. :PORTB AS OUTPUT — LEDS
  502. ldi temp,UxFF
  503. out DDRB,temp
  504.  
  505. :PORTD AS BOTH INPUT OUTPUT
  506.  
  507. :ONLY PD6 AS INPUT — OTHERS ARE OUTPUT
  508. :PDS OUTPUT OD UCRl
  509.  
  510. 1di temp,0b10111111
  511.  
  512. out DDRD,temp
  513.  
  514. :PORTC AS INPUT FOR SW
  515. ldi temp,0
  516. out DDRC,temp
  517.  
  518. PWM:
  519.  
  520. JZUX DUTY CYCLE
  521.  
  522. ldi temp,0h10000011
  523. out TCCRlA,temp
  524.  
  525. ldi temp.1
  526.  
  527. out TCCRlB,temp
  528.  
  529. ldi temp,0
  530.  
  531. out OCRlAH,temp
  532.  
  533. ldi temp,205
  534.  
  535. out OCRlAI,temp
  536. mov timer,temp
  537.  
  538. increase_loap:
  539.  
  540. :HAIT FOR SUD TO BE PRESSED
  541. Sbic PINC,0
  542. rjmp increase_loop
  543.  
  544. :INCREASE THE OCRlAL BY 51 ( N + 5% DUTY CYCLE )
  545. add timer,increase_step
  546. out OCRlAI,timer
  547.  
  548. inc counter
  549.  
  550. Cpi CDunter,increase_iteratiuns
  551. breq continue
  552.  
  553. rjmp increase_loop
  554.  
  555. continue:
  556. clr counter
  557.  
  558. decrease_loap:
  559.  
  560. Zto napomdtu) npéypauua EAéyxouue tov KLvntfipa uéou) tou
  561. AVR,BdZovmq 001v eiooéo “La nakuooapd us tnv Asttoupyia tou PWM .Kdee
  562. cbopd aufidvou us to duty cycle KOL‘EéL 5% (obvvo 10 ¢opéq).Katémv K6168
  563. cbopd ueubvou us to duty cycle KOL‘EéL 5% (obvvo 10 cbopéq).
  564.  
  565. .inolude "m16def.inc”
  566.  
  567. .def increase_step = r16
  568.  
  569. .def decrease_step = r12
  570.  
  571. .def counter = r18
  572.  
  573. .def lads = r19
  574.  
  575. .def temp = r20
  576.  
  577. .def timer = r21
  578.  
  579. .equ increase_iterations = 10
  580. .equ decrease_iterations = 10
  581.  
  582. .equ value_for_higher_duty_oyole
  583. .equ value_for_lower_duty_oyole =
  584.  
  585. rjmp reset
  586.  
  587. reset:
  588.  
  589. :INITIALIZE STACK POINTER
  590. ldi temp.HIGH(RAMEND)
  591.  
  592. out SPH,temp
  593.  
  594. ldi temp,LOU(RAMEND)
  595.  
  596. out SPL,temp
  597.  
  598. :INITIALIZE THE PARAMETERS
  599.  
  600. ldi inorease_step,value_for_higher_duty_oycle
  601. ldi deorease_step,value_for_lower_duty_oyole
  602.  
  603. olr counter
  604.  
  605. :PORTB AS OUTPUT — LEDS
  606. ldi temp,UxFF
  607.  
  608. out DDRB,temp
  609.  
  610. :PORTD AS BOTH INPUT OUTPUT
  611.  
  612. :ONLY PDE AS INPUT — OTHERS ARE OUTPUT
  613.  
  614. :PDS OUTPUT OF 0CR1
  615. ldi temp,0h10111111
  616. out DDRD,temp
  617.  
  618. PHK
  619.  
  620. JZUX DUTY CYCLE
  621. ldi temp,0h10000011
  622. out TCCRlA,temp
  623.  
  624. ldi temp,1
  625.  
  626. out TCCRlB,temp
  627.  
  628. ldi temp.0
  629.  
  630. out OCRlAH,temp
  631.  
  632. ldi temp,205
  633.  
  634. out OCRlAI,temp
  635. mov timer,temp
  636.  
  637. inorease_loop:
  638.  
  639. :INCREASE THE OCRlAI BY 51 ( + 5% DUTY CYCLE )
  640.  
  641. add timer,inoreaee_step
  642. out OCRlAI,timer
  643.  
  644. inc counter
  645.  
  646. opi counter,increase_iterations
  647. hreq continue
  648.  
  649. rjmp inoreaee_loop
  650.  
  651. continue:
  652. olr counter
  653.  
  654. roall delay_10_seoonde
  655.  
  656. deorease_loop:
  657.  
  658. :DECREASE THE OCRlAl BY 51 ( — ABOUT 5X DUTY CYCLE )
  659.  
  660. sub timer,deoreaee_step
  661. out OCRlAI,timer
  662.  
  663. 1no counter
  664.  
  665. opi counter,decrease_iterations
  666. hreq end_of_program
  667.  
  668. rjmp deorease_loop
  669.  
  670. end_of_program:
  671.  
  672. rjmp end_of_program
  673.  
  674. delay_l0_eeeonde:
  675.  
  676. ldi I22. 203
  677.  
  678. ldi I23. 236
  679.  
  680. ldi I24. 133
  681. 11: dee r24
  682.  
  683. hrne ll
  684. dee r23
  685. hrne Ll
  686. deo r22
  687. brne Ll
  688. nop
  689.  
  690. ret



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